Power Architecture is a broad term to describe similar instruction sets for RISC microprocessors developed and manufactured by such companies as IBM, Freescale, AMCC, Tundra and P.A. Semi. An instruction set is a list of all the instructions and all their variations that a processor can execute A microprocessor incorporates most or all of the functions of a Central processing unit (CPU on a single Integrated International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology Freescale Semiconductor Inc is an American Semiconductor manufacturer Applied Micro Circuits Corporation ( is a Fabless semiconductor company designing network and embedded Power Architecture (including a Power Tundra Semiconductor Corporation ( supplies communications computing and storage companies with system interconnect products Intellectual property and design services PA Semi (originally "Palo Alto Semiconductor" is a Fabless semiconductor company founded in Santa Clara California in 2003 by Dan Dobberpuhl The governing body is Power.org, comprising over 40 companies and organisations. Powerorg is an organization whose purpose is to develop enable and promote Power Architecture technology
The term "Power Architecture" should not be confused with IBM's different generations of "POWER architectures" where the latter is a broad term including all products based on POWER, PowerPC and Cell architectures. POWER is a RISC Instruction set architecture designed by IBM. PowerPC is a RISC Instruction set architecture created by the 1991 Apple – IBM – Motorola alliance known as AIM Cell is a Microprocessor architecture jointly developed by Sony Computer Entertainment, Toshiba, and IBM, an Power Architecture is a family name describing processor architecture, software, toolchain, community and end-user appliances and not a strict term describing specific products or technologies. In Software, a toolchain is the set of Computer programs ( tools) that are used to create a product (typically another computer program or system of programs
| Power Architecture |
|---|
| Historical |
POWER • PPC6xx • PowerPC-AS • POWER2 • POWER3 • G4 • POWER4 • Gekko • AIM alliance |
| Current |
PowerPC • e200 • e300 • e500 • e600 • PA6T • POWER5 • POWER6 • PPC4xx • PPC750 • PPC970 • CBEA • Xenon • Broadway |
| Future |
| Related Links |
RISC • System p • System i • Power.org • PAPR • PReP • CHRP • more... |
Contents |
There can be misunderstanding of the meaning of the terms, POWER, PowerPC and Power Architecture. CPU design is the Design engineering task of creating a Central processing unit (CPU a component of Computer hardware. POWER is a RISC Instruction set architecture designed by IBM. The PowerPC 600 family was the first family of PowerPC processors built The IBM RS64 family of processors is used in the late 1990s for IBM's RS/6000 and AS/400 server product lines The IBM POWER2 (originally named RIOS2) microprocessor was released in 1993 as the successor of the POWER1. The POWER3 chip is a CPU, designed and exclusively manufactured by IBM, that implements the 32/64-bit PowerPC Instruction set architecture PowerPC G4 is a designation used by Apple Computer to describe a fourth generation of 32-bit PowerPC Microprocessors Apple has applied this The POWER4 chip is a CPU that implements the 64-bit PowerPC architecture. Gekko is a 32-bit PowerPC Microprocessor custom made by IBM in 2000 for Nintendo to use as the CPU in their sixth The AIM alliance was an alliance formed in September 1991 between Apple Computer, IBM and Motorola to create a new computing standard based PowerPC is a RISC Instruction set architecture created by the 1991 Apple – IBM – Motorola alliance known as AIM The PowerPC e200 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in Automotive The PowerPC e300 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in System-on-a-chip The PowerPC e500 is a 32-bit Power Architecture based Microprocessor core from Freescale. The PowerPC e600 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in high performance PWRficient is the name of a series of Microprocessors designed by P POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. The POWER6 microprocessor is IBM 's follow-on to the POWER5. It is part of the eCLipz project, said The PowerPC 400 family is a line of 32-bit embedded RISC - processor cores built using Power Architecture technology PowerPC G3 is a designation used by Apple Computer to a third generation of PowerPC Microprocessors from the PowerPC 750 family designed The PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM Cell is a Microprocessor architecture jointly developed by Sony Computer Entertainment, Toshiba, and IBM, an Xenon is a CPU that is used in the Xbox 360 game console The processor internally codenamed "Waternoose" by IBM and "XCPU" Broadway is the name of the Central Processing Unit (CPU used in Nintendo's Wii Video game console. POWER7 is a Microprocessor currently under development at about a dozen IBM sites including IBM 's The PowerPC e700 or NG-64 (Next Generation 64-bit is a line of future high performance 64-bit embedded RISC - processor cores built Titan is a family of 32-bit Power Architecture based Microprocessors designed by Applied Micro Circuits Corporation (AMCC The System p, formerly known as RS/6000, was IBM 's RISC / UNIX -based server and workstation product line The IBM System i is IBM's previous generation of systems designed for IBM i users and was subsequently replaced by the IBM Power Systems in April 2008 Powerorg is an organization whose purpose is to develop enable and promote Power Architecture technology Power Architecture Platform Reference (PAPR is an initiative from Power PowerPC Reference Platform ( PReP) was a standard System architecture for PowerPC based computer systems (as well as a Reference implementation Common Hardware Reference Platform ( CHRP) was a standard System architecture for PowerPC based computer systems published jointly by IBM Here is a glossary with brief descriptions of each term, and links to articles with details.
| Term | Description |
|---|---|
| POWER | Performance Optimization With Enhanced RISC. A microprocessor architecture designed by IBM. |
| PowerPC | Power Performance Computing. POWER is a RISC Instruction set architecture designed by IBM. A 32/64-bit instruction set for microprocessors derived from POWER, including some new elements. Designed by the AIM alliance; Apple, IBM and Motorola. The AIM alliance was an alliance formed in September 1991 between Apple Computer, IBM and Motorola to create a new computing standard based |
| PowerPC-AS | PowerPC-Advanced Series. PowerPC is a RISC Instruction set architecture created by the 1991 Apple – IBM – Motorola alliance known as AIM Codename "Amazon". A purely 64-bit variant of PowerPC, including some elements from the POWER2 specification. Used in IBM's RS64 family processors and newer POWER processors. The IBM RS64 family of processors is used in the late 1990s for IBM's RS/6000 and AS/400 server product lines |
| POWERn | Where n is a number from 1 to 7. The IBM RS64 family of processors is used in the late 1990s for IBM's RS/6000 and AS/400 server product lines A series of high end microprocessors built by IBM using different combinations of POWER, PowerPC and PowerPC-AS instruction sets. Main articles: IBM POWER, POWER2, POWER3, POWER4, POWER5, POWER6 and POWER7 |
| Cell | Cell Broadband Engine Architecture (CBEA), a microprocessor architecture designed by IBM, Sony and Toshiba, which has Power Architecture as a part. POWER is a RISC Instruction set architecture designed by IBM. The IBM POWER2 (originally named RIOS2) microprocessor was released in 1993 as the successor of the POWER1. The POWER3 chip is a CPU, designed and exclusively manufactured by IBM, that implements the 32/64-bit PowerPC Instruction set architecture The POWER4 chip is a CPU that implements the 64-bit PowerPC architecture. POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. The POWER6 microprocessor is IBM 's follow-on to the POWER5. It is part of the eCLipz project, said POWER7 is a Microprocessor currently under development at about a dozen IBM sites including IBM 's |
| Power Architecture | The broad term designating all that is POWER, PowerPC and Cell including software, toolchain and end-user appliances. Cell is a Microprocessor architecture jointly developed by Sony Computer Entertainment, Toshiba, and IBM, an In Software, a toolchain is the set of Computer programs ( tools) that are used to create a product (typically another computer program or system of programs This is what this article is all about. |
| Power ISA | A new instruction set, combining late versions of POWER and PowerPC instruction sets. Designed by IBM and Freescale. Freescale Semiconductor Inc is an American Semiconductor manufacturer |
Power Architecture began its life at IBM in the late 1980s when they wanted a high performance RISC architecture for their mid range workstations and servers. The result was the "POWER architecture" with its first implementation in 1990 in the RISC System/6000, later RS/6000, computers. POWER is a RISC Instruction set architecture designed by IBM. The System p, formerly known as RS/6000, was IBM 's RISC / UNIX -based server and workstation product line This was the 11 chip RIOS processor, later called POWER1. The RISC Single Chip (RSC) processor was developed from RIOS. RISC Single Chip (RSC is a single chip microprocessor based on POWER1, used in IBM RS/6000 models 220 and 230
In 1992, Apple, Motorola and IBM formed the AIM alliance to develop a mass market version of the POWER processor. Apple Inc, ( formerly Apple Computer Inc, is an American Multinational corporation with a focus on designing and manufacturing Consumer electronics Motorola Inc ( is an American, multinational Fortune 100, Telecommunications company based in Schaumburg Illinois. The AIM alliance was an alliance formed in September 1991 between Apple Computer, IBM and Motorola to create a new computing standard based The result of this was the "PowerPC architecture", a modified version of the POWER architecture. PowerPC is a RISC Instruction set architecture created by the 1991 Apple – IBM – Motorola alliance known as AIM The first implementation was the PowerPC 601 in 1993, based heavily on RSC, found its way into Apple's Power Mac computers as well as IBM RS/6000 systems. The PowerPC 600 family was the first family of PowerPC processors built Power Macintosh, later Power Mac, is a line of Apple Macintosh Workstation -class Personal computers based on various models of PowerPC
IBM expanded their POWER architecture for their RS/6000 systems which resulted in the eight chip POWER2 processor 1993 and a single chip version called P2SC, "POWER2 Super Chip", 1996. The IBM POWER2 (originally named RIOS2) microprocessor was released in 1993 as the successor of the POWER1.
In the early 1990s IBM sought to replace the CISC based AS/400 minicomputers with a RISC architecture. The IBM System i is IBM's previous generation of systems designed for IBM i users and was subsequently replaced by the IBM Power Systems in April 2008 A minicomputer (colloquially mini) is a class of multi-user Computers that lies in the middle range of the computing spectrum in between the largest Multi-user This new architecture's development code name was called "Amazon" became referred to as the PowerPC-AS ("Advanced Series" or "Amazon Series") amongst engineers working on the project. PowerPC-AS was to be a multi-processor server platform based on RSC. As development continued at IBM Research labs to extend RSC to support a 64-processor inter-connect and add features specific to AS/400. RS/6000 developers joined in and added some POWER2 features and it all ended up in the 64-bit processors of the RS64 line in 1997, used in AS/400 and RS/6000 systems. '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s. The IBM RS64 family of processors is used in the late 1990s for IBM's RS/6000 and AS/400 server product lines
The AIM Alliance kept developing PowerPC in 1995 through 1997 and released the second generation PowerPC processors: The PowerPC 602 for set top boxes and game consoles, the PowerPC 603 geared towards the embedded market and portable computers, the PowerPC 604 towards workstations and PowerPC 620 was a 64-bit high performance processor for servers. The PowerPC 600 family was the first family of PowerPC processors built The PowerPC 600 family was the first family of PowerPC processors built The PowerPC 600 family was the first family of PowerPC processors built The PowerPC 600 family was the first family of PowerPC processors built The 602 and 620 never found widespread use but the 603, 604 and their successors became very popular in their respective fields. Motorola and IBM also made the "Book E"[1] extension of PowerPC, used in embedded implementations: Motorola's PowerQUICC processors and IBM's PowerPC 400 family. PowerQUICC is the name for several Power Architecture based Microcontrollers from Freescale Semiconductor. The PowerPC 400 family is a line of 32-bit embedded RISC - processor cores built using Power Architecture technology
The last effort of the AIM Alliance was the third generation PowerPC 750 in 1997. PowerPC G3 is a designation used by Apple Computer to a third generation of PowerPC Microprocessors from the PowerPC 750 family designed Motorola and IBM went their separate ways in developing the PowerPC architecture after that. The "G3" processors found widespread use in both computer and embedded markets and IBM kept evolving the 750 family in the years to come but Motorola chose to focus on the embedded market with PowerPC SoC designs and what they called the fourth generation PowerPC, the PowerPC 7400 which incorporated Altivec, a SIMD unit. System-on-a-chip or system on chip ( SoC or SOC) refers to integrating all components of a Computer or other electronic System PowerPC G4 is a designation used by Apple Computer to describe a fourth generation of 32-bit PowerPC Microprocessors Apple has applied this AltiVec is a Floating point and integer SIMD Instruction set designed and owned by Apple, IBM and Freescale Semiconductor In Computing, SIMD ( S ingle I nstruction M ultiple D ata is a technique employed to achieve data level parallelism as in a Vector The "PowerPC G4" came 1999 and was used by Apple in workstations and laptops and by various companies in the telecom market.
In 1998 came POWER3 which unified the PowerPC and POWER2 architectures but was only used in IBM's RS/6000 servers. The POWER3 chip is a CPU, designed and exclusively manufactured by IBM, that implements the 32/64-bit PowerPC Instruction set architecture
2000 saw the last implementation of the PowerPC-AS architecture, the RS64-IV, used in AS/400 and RS/6000, now renamed eServer iSeries and eServer pSeries respectively. IBM also makes the Gekko processor for use in Nintendo's game console GameCube. Gekko is a 32-bit PowerPC Microprocessor custom made by IBM in 2000 for Nintendo to use as the CPU in their sixth is a Multinational corporation headquartered in Kyoto Japan founded on The, often abbreviated as GCN, is Nintendo 's fourth home Video game console and is part of the sixth generation console era. It's based on the PowerPC 750CXe. IBM built the Rivina, experimental 64-bit PowerPC processor, which became the first microprocessor to surpass the 1 GHz mark. Rivina is an experimental 64-bit PowerPC Microprocessor built by IBM in 2000.
In 2001 IBM introduced the POWER4 which unified and replaced the PowerPC-AS and POWER3 architectures. The POWER4 chip is a CPU that implements the 64-bit PowerPC architecture.
In 2002 Apple desperately need a new high end PowerPC part and got IBM to make the 64-bit PowerPC 970. The PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM Apple described it as the fifth generation PowerPC or "G5". 970 is derived from POWER4 but lacks some server oriented features, but does have an AltiVec unit. The 970 and its descendants are used by Apple and IBM and some high end embedded applications.
Tundra buys the PowerPC 100 family microcontrollers from Motorola in 2003 which spun off its semiconductor division into a new company called Freescale Semiconductor in 2004. Freescale Semiconductor Inc is an American Semiconductor manufacturer
Culturecom licenses PowerPC technology from IBM for their V-Dragon processor in 2003. The PowerPC 400 family is a line of 32-bit embedded RISC - processor cores built using Power Architecture technology
POWER5 from IBM, introduced in 2004, is an evolution from POWER4 and bumps the PowerPC specification to v. POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. 2. 01,[2] and again to v. 2. 02[3] in 2005 with the POWER5+.
AMCC licenses IP and staff from IBM concerning the PowerPC 400 family in 2004. Applied Micro Circuits Corporation ( is a Fabless semiconductor company designing network and embedded Power Architecture (including a Power Intellectual property ( IP) is a legal field that refers to creations of the mind such as musical literary and artistic works inventions and symbols names [4]
Motorola/Freescale renamed its PowerPC families to e200, e300, e500 and e600 and announces the future 64-bit e700. The PowerPC e200 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in Automotive The PowerPC e300 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in System-on-a-chip The PowerPC e500 is a 32-bit Power Architecture based Microprocessor core from Freescale. The PowerPC e600 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in high performance The PowerPC e700 or NG-64 (Next Generation 64-bit is a line of future high performance 64-bit embedded RISC - processor cores built
Power.org is founded the same year, by IBM alongside 15 other companies, as an organization whose mission is to develop products revolving around the Power Architecture. Powerorg is an organization whose purpose is to develop enable and promote Power Architecture technology Its purpose is to develop, enable and promote Power Architecture technology. [5]
2005 also saw the specifications of the Cell processor,[6] jointly developed by IBM, Sony and Toshiba over a four year period. Cell is a Microprocessor architecture jointly developed by Sony Computer Entertainment, Toshiba, and IBM, an is a multinational conglomerate corporation headquartered in Minato Tokyo, Japan, and one of the world's largest Media conglomerates with ( is a multinational conglomerate manufacturing company headquartered in Tokyo, Japan. Its primary use is for Sony's PlayStation 3. Cell uses a single 64-bit Power Architecture core, and adds 8 independent SIMD cores called SPEs. In Computing, SIMD ( S ingle I nstruction M ultiple D ata is a technique employed to achieve data level parallelism as in a Vector IBM also reveals the Xenon-processor, a tri-core 64-bit processor for use in Microsoft's Xbox 360. Xenon is a CPU that is used in the Xbox 360 game console The processor internally codenamed "Waternoose" by IBM and "XCPU" Microsoft Corporation is an American multinational Computer technology Corporation, which rose to dominate the Home computer The Xbox 360 is the second Video game console produced by Microsoft, and was developed in cooperation with IBM, ATI, and SiS. With the 32-bit PowerPC based Broadway processor that Nintendo will use for its Wii console, IBM has put Power Architecture processors in all three of the major seventh generation game consoles. Broadway is the name of the Central Processing Unit (CPU used in Nintendo's Wii Video game console. In the History of video games, the seventh generation, which is also the current generation primarily focuses on the consoles released since by Nintendo,
P.A. Semi licenses Power Architecture technology from IBM for use in its upcoming PWRficient processors. PA Semi (originally "Palo Alto Semiconductor" is a Fabless semiconductor company founded in Santa Clara California in 2003 by Dan Dobberpuhl PWRficient is the name of a series of Microprocessors designed by P
Freescale joins Power. org in 2006 and IBM makes the specifications of PowerPC 405 freely available to researchers and academia. The PowerPC 400 family is a line of 32-bit embedded RISC - processor cores built using Power Architecture technology
Rapport Inc announces Kilocore technology where 1024 8-bit processing elements are strapped to a 32-bit PowerPC core. Kilocore, from Rapport Inc and IBM, is a high-performance low-power multi-core processor with 1025 cores
Power. org released the Power ISA version 2. 03. [7] in September 2006. All previous PowerPC specifications will be compatible with the 64-bit Power ISA. This will among other things add VMX, virtualization and variable length encoding (VLE, 2-byte instructions added to previously 4-byte instructions) to the specification.
Power. org releases the Power Architecture Platform Reference, PAPR, in the fourth quarter of 2006. Power Architecture Platform Reference (PAPR is an initiative from Power It provides the foundation for development of Power Architecture based computers using the Linux operating system.
In April 2007, Freescale and IPextreme opens up a licensing program for Freescale's PowerPC e200 core. The PowerPC e200 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in Automotive [8]
In May 2007 IBM launches its POWER6 high end microprocessor at speeds up to 5. The POWER6 microprocessor is IBM 's follow-on to the POWER5. It is part of the eCLipz project, said 0 GHz, doubling the performance of the previous POWER5. The POWER6 adds AltiVec to the POWER series and an FPU supporting decimal arithmetic. The same day AMCC announced its Titan hign end embedded processor, reaching 2 GHz while consuming very little power. Titan is a family of 32-bit Power Architecture based Microprocessors designed by Applied Micro Circuits Corporation (AMCC It uses innovative logic design from Intrinsity and will be available in 2008. Intrinsity is a Austin Texas based Fabless semiconductor company was founded in 1997 as EVSX on the remnants of Exponential Technology
The members of Power. org finalizezd the Power ISA v. 2. 04[9] specification in June 2007. Improvements are mainly focused on server applications and virtualization.
At the Power Architecture Developer Conference in September 2007, drafts to Power ISA v. 2. 05 and ePAPR specification was shown, and a Linux based reference design based on PowerPC 970MP was revealed. Linux (commonly pronounced ˈlɪnəks [10]
The Power ISA v. 2. 05 specification was released in December 2007. [11]
In April 2008, IBM rebrands their Power Architecture based hardware, System p and System i. They are now called "Power Systems". Power Systems is the name of IBM 's unified Power Architecture -based server line merging both System i and System p server platforms and running At the same time they rebranded the i5/OS operating system "IBM i". IBM i is an Operating system used on IBM Power Systems, a unified server platform from the former IBM System i and IBM System p servers
On April 23, 2008, Apple acquired P.A. Semi for a reported $278 million. PA Semi (originally "Palo Alto Semiconductor" is a Fabless semiconductor company founded in Santa Clara California in 2003 by Dan Dobberpuhl [12]
According to the TOP500-list, seven of the ten fastest supercomputers in the world and 21 of the top 50 are using IBM's technologies based on Power Architecture. The TOP500 project ranks and details the 500 most powerful known Computer systems in the world A supercomputer is a Computer that is at the frontline of processing capacity particularly speed of calculation (at the time of its introduction Of the top ten, four use Power Architecture processors as computing elements and three use them as communications processors.
The Power Architecture is open for licensing by third parties. Licencees can chose to license anything from a single predefined core, to a complete new family of Power Architecture products.
IBM licenses hard (predefined chip designs) and soft (synthesized design that can be used in different foundries) core implementations of both the 32-bit and 64-bit Power Architecture, either directly or through Power Design Center partners such as HCL Technologies or Synopsys. Logic synthesis is a process by which an abstract form of desired circuit behavior (typically Register transfer level (RTL or behavioral is turned into a design implementation Hindustan Computers Limited, also known as HCL Enterprise, is one of India 's largest Electronics, Computing and Information technology Not to be confused with Synopsis Synopsys Inc is one of the largest companies in the Electronic design automation industry On a strategic basis, IBM also provide both microarchitecture and architecture licenses. In Computer engineering, microarchitecture (sometime abbreviated to µarch or uarch is a description of the Electrical circuitry of a Computer, Central A microarchitecture license enables licensees to implement a new pipeline for a core, but not to add or subtract instructions from the Power Instruction Set Architecture (ISA). Pipelining redirects here For HTTP pipelining see HTTP pipelining. An instruction set is a list of all the instructions and all their variations that a processor can execute Microarchitecture licenses cover both 64-bit and 32-bit, although individual licenses are available if necessary/desired.
IBM has announced plans to make the specifications of the PowerPC 405 core freely available to the academic and research community. The PowerPC 400 family is a line of 32-bit embedded RISC - processor cores built using Power Architecture technology
In April 2007 Freescale and IPextreme opened up the PowerPC e200 cores for licensing to other manufacturers. The PowerPC e200 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in Automotive [8]
Companies which have licenses developing their own processors based on the Power Architecture including Tundra, AMCC, HCL, Culturecom, P. A. Semi, Xilinx, Microsoft, Rapport, Sony, Honeywell, Toshiba and Cray.
The Instruction Set architecture is divided into several Categories and every component is defined as a part of a category. And each category resides within a certain Book. Processors implement a set of these categories. Different classes of processors are required to implement certain Categories, for example a server class processor use categories Server, Base, Floating Point, 64-bit, etc. All processors implement the Base category.
It is a RISC load/store architecture. It has multiple set of registers:
Instructions have a 4-byte (32-bit) uniform length with the exception of the VLE (variable-length encoding) subset that provides for higher code density for low-end embedded applications. Most instructions are triadic, i. In Logic and Mathematics, a triadic relation or a ternary relation is an important special case of a polyadic or finitary relation, one in which e. have two source operands and one destination. Single and double precision IEEE-754 compliant floating point operations are supported with additional multiply add instructions. In Computing, double precision is a Computer numbering format that occupies two adjacent storage locations in computer memory The IEEE Standard for Binary Floating-Point Arithmetic ( IEEE 754) is the most widely-used standard for floating-point computation and is followed by many In computing especially Digital signal processing, multiply-accumulate is a common operation that computes the product of two numbers and adds that product to an accumulator There are provisions for SIMD operations on integer and floating point data on up to 16 elements in a single instruction. In Computing, SIMD ( S ingle I nstruction M ultiple D ata is a technique employed to achieve data level parallelism as in a Vector
Support for Harvard cache, i. The Harvard architecture is a Computer architecture with physically separate storage and signal pathways for instructions and data e. split data and instruction caches, as well as support for unified caches. Memory operations are strictly load/store, but allow for out-of-order execution. In Computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance Microprocessors to make use of cycles that Support for both big and little-endian addressing with separate categories for moded and per-page endianess. Support for both 32-bit and 64-bit addressing. The range of Integer values that can be stored in 32 bits is 0 through 4294967295 or −2147483648 through 2147483647 using Two's complement encoding '64-bit' CPUs have existed in Supercomputers since the 1960s and in RISC -based workstations and servers since the early 1990s.
Different modes of operation: User, supervisor and hypervisor.
The Power Architecture specification is divided into multiple "books", five parts:
The specification for Power ISA v. 2. 03[7] is based on the former PowerPC ISA v. 2. 02[3] in POWER5+ and the Book E[1] extension of the PowerPC specification. POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. PowerPC is a RISC Instruction set architecture created by the 1991 Apple – IBM – Motorola alliance known as AIM The Book I included five new chapters regarding auxiliary processing units like DSPs and the AltiVec extension. A digital signal processor ( DSP or DSP micro) is a specialized Microprocessor designed specifically for Digital signal processing, generally AltiVec is a Floating point and integer SIMD Instruction set designed and owned by Apple, IBM and Freescale Semiconductor
Compliant cores
Non-compliant cores
The specification for Power ISA v. 2. 04[9] was finalized in June 2007. It is based on Power ISA v. 2. 03 and includes changes primarily to the Book III-S part regarding virtualization, hypervisor functionality, logical partitioning and virtual page handling. In Computing, a hypervisor, also called virtual machine monitor, is a virtualization platform that allows multiple Operating systems to run on In Computing, a logical partition, commonly called an LPAR, is a subset of computer's hardware resources virtualized as a separate computer In a context of Computer Virtual memory, a page, memory page, or virtual page is a fixed-length block of Main memory, that is contiguous
Compliant cores
The specification for Power ISA v. 2. 05[11] was released in December 2007. It is based on Power ISA v. 2. 04 and includes changes primarily to Book I and Book III-S, including significant enhancements such as decimal arithmetic (Category: Decimal Floating-Point in Book I) and server hypervisor improvements.
Compliant cores
Power ISA v. 2. 06 will include extensions for the POWER7 processor and e500-mc core. The PowerPC e500 is a 32-bit Power Architecture based Microprocessor core from Freescale. It will also include significant enhancement for the embedded specification regarding hypervisor and virtualisation on single and multi core implementations. It will be released the second half of 2008. [10]
Some examples.