The POWER6 microprocessor is IBM's follow on to the POWER5. Power Architecture is a broad term to describe similar Instruction sets for RISC Microprocessors developed and manufactured by such companies as IBM CPU design is the Design engineering task of creating a Central processing unit (CPU a component of Computer hardware. POWER is a RISC Instruction set architecture designed by IBM. The PowerPC 600 family was the first family of PowerPC processors built The IBM RS64 family of processors is used in the late 1990s for IBM's RS/6000 and AS/400 server product lines The IBM POWER2 (originally named RIOS2) microprocessor was released in 1993 as the successor of the POWER1. The POWER3 chip is a CPU, designed and exclusively manufactured by IBM, that implements the 32/64-bit PowerPC Instruction set architecture PowerPC G4 is a designation used by Apple Computer to describe a fourth generation of 32-bit PowerPC Microprocessors Apple has applied this The POWER4 chip is a CPU that implements the 64-bit PowerPC architecture. Gekko is a 32-bit PowerPC Microprocessor custom made by IBM in 2000 for Nintendo to use as the CPU in their sixth The AIM alliance was an alliance formed in September 1991 between Apple Computer, IBM and Motorola to create a new computing standard based PowerPC is a RISC Instruction set architecture created by the 1991 Apple – IBM – Motorola alliance known as AIM The PowerPC e200 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in Automotive The PowerPC e300 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in System-on-a-chip The PowerPC e500 is a 32-bit Power Architecture based Microprocessor core from Freescale. The PowerPC e600 is a family of 32-bit Power Architecture Microprocessor cores developed by Freescale for primary use in high performance PWRficient is the name of a series of Microprocessors designed by P POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. The PowerPC 400 family is a line of 32-bit embedded RISC - processor cores built using Power Architecture technology PowerPC G3 is a designation used by Apple Computer to a third generation of PowerPC Microprocessors from the PowerPC 750 family designed The PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM Cell is a Microprocessor architecture jointly developed by Sony Computer Entertainment, Toshiba, and IBM, an Xenon is a CPU that is used in the Xbox 360 game console The processor internally codenamed "Waternoose" by IBM and "XCPU" Broadway is the name of the Central Processing Unit (CPU used in Nintendo's Wii Video game console. POWER7 is a Microprocessor currently under development at about a dozen IBM sites including IBM 's The PowerPC e700 or NG-64 (Next Generation 64-bit is a line of future high performance 64-bit embedded RISC - processor cores built Titan is a family of 32-bit Power Architecture based Microprocessors designed by Applied Micro Circuits Corporation (AMCC The System p, formerly known as RS/6000, was IBM 's RISC / UNIX -based server and workstation product line The IBM System i is IBM's previous generation of systems designed for IBM i users and was subsequently replaced by the IBM Power Systems in April 2008 Powerorg is an organization whose purpose is to develop enable and promote Power Architecture technology Power Architecture Platform Reference (PAPR is an initiative from Power PowerPC Reference Platform ( PReP) was a standard System architecture for PowerPC based computer systems (as well as a Reference implementation Common Hardware Reference Platform ( CHRP) was a standard System architecture for PowerPC based computer systems published jointly by IBM International Business Machines Corporation abbreviated IBM and nicknamed "Big Blue", is a multinational Computer Technology POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. It is part of the eCLipz project, said to have a goal of converging IBM's server hardware where practical (hence "ipz" in the acronym: iSeries, pSeries, and zSeries). The IBM System i is IBM's previous generation of systems designed for IBM i users and was subsequently replaced by the IBM Power Systems in April 2008 The System p, formerly known as RS/6000, was IBM 's RISC / UNIX -based server and workstation product line IBM System z, or earlier IBM eServer zSeries, is a brand name designated by IBM to all its Mainframe computers In 2000 IBM rebranded the existing ^[1]

POWER6 was described at the IEEE International Solid-State Circuits Conference[1] in February 2006, and additional details were added at Microprocessor Forum in October 2006[2] and ISSCC in February 2007. It was formally announced on 21 May 2007 [3].

Description

The POWER6 has approximately 790 million transistors and is 341 mm² large fabricated on an 65 nm process. The 65 nanometer (65 nm process is an advanced lithographic node used in volume CMOS Semiconductor fabrication. It was released on the 8th June 2007, at speeds of 3. 5 GHz, 4. The hertz (symbol Hz) is a measure of Frequency, informally defined as the number of events occurring per Second. 2 GHz and 4. 7 GHz^[2], but the company has noted prototypes have reached 6 GHz. ^[3] POWER6 reached first silicon in the middle of 2005^[4].

Dr Frank Soltis, an IBM chief scientist, said IBM had solved power leakage problems associated with high frequency by using a combination of 90 nm and 65 nm parts in the POWER6 design. Frank G Soltis (born 1940 an American computer scientist, is IBM 's Chief Scientist for the System i computers The 90 nanometer (90 nm process refers to the level of CMOS process technology that was reached in the 2002-2003 timeframe by most leading semiconductor companies ^[5]

The processor is a dual core design and has 128 KiB of L1 cache (64 KiB data + 64 KiB instruction), an eight-way set-associative design with a two-stage pipeline supporting two independent 32-bit reads or one 64-bit write per cycle. A multi-core processor (or chip-level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single Integrated A kibibyte (a contraction of ki lo bi nary byte) is a unit of Information or Computer storage, established by the International ^[6] Each core will have a 4 MiB "semi shared" L2 cache, where the cache is assigned a specific core, but the other has a fast access to it. A mebibyte (a contraction of me ga bi nary byte) is a unit of Information or Computer storage, abbreviated MiB. The two cores share a 32 MiB large L3 cache which is off die, using an 80 GB/s bus. ^[7]

Each core has two integer units, two binary floating-point units, and a decimal floating-point unit, and is capable of two way SMT. In Computing, an arithmetic logic unit ( ALU) is a Digital circuit that performs Arithmetic and Logical operations A floating point unit (FPU is a part of a Computer system specially designed to carry out operations on Floating point numbers The decimal ( base ten or occasionally denary) Numeral system has ten as its base. Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of Superscalar CPUs with Hardware The binary floating-point unit incorporates “many microarchitectures, logic, circuit, latch and integration techniques to achieve [a] 6-cycle, 13-FO4 pipeline,” according to a company paper. ^[6] Unlike the servers from IBM's competitors, the POWER6 has hardware support for decimal arithmetic and will include the first decimal floating-point unit integrated in silicon. In Computing, floating point describes a system for numerical representation in which a string of digits (or Bits represents a Real number. More than 50 new floating point instructions handle the decimal math and conversions between binary and decimal. The binary numeral system, or base-2 number system, is a Numeral system that represents numeric values using two symbols usually 0 and 1. In Computing and electronic systems binary-coded decimal ( BCD) is an encoding for decimal numbers in which each digit is represented by its own binary ^[7] This is a feature being added to the processors powering IBM's System z. IBM System z, or earlier IBM eServer zSeries, is a brand name designated by IBM to all its Mainframe computers In 2000 IBM rebranded the existing ^[8]

There is an AltiVec unit to POWER6, and the processor is fully compliant with the new Power ISA v.2.03 specification. AltiVec is a Floating point and integer SIMD Instruction set designed and owned by Apple, IBM and Freescale Semiconductor Power Architecture is a broad term to describe similar Instruction sets for RISC Microprocessors developed and manufactured by such companies as IBM POWER6 also takes advantage of ViVA-2, Virtual Vector Architecture, which enables the combination of several POWER6 nodes to act as a single Vector processor. ViVA ( Vi rtual V ector A rchitecture is a technology from IBM for coupling together multiple scalar Floating point units to A vector processor, or array processor, is a CPU design where the instruction set includes operations that can perform mathematical operations on multiple data ^[8]

A notable difference from POWER5 is that IBM moved from an out-of-order design to an in-order design, a drastic change which should require software recompilation for top performance. POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. In Computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance Microprocessors to make use of cycles that However, the processor still achieves significant performance improvements even with unmodified software, according to the lead engineer on the POWER6 project. ^[2]

IBM also makes use of a 5 GHz duty-cycle correction clock distribution network for the processor. In the network, the company implements a copper distribution wire that is 3 µm wide and 1. 2 µm thick. The POWER6 design uses dual power supplies, a logic supply in the 0. 8-to-1. 2 Volt range and an SRAM power supply at about 150-mV higher. ^[6]. The thermal characteristics of POWER6 are similar to that of the POWER5. POWER5 is a Microprocessor developed by IBM. It is an improved variant of the highly successful POWER4.

POWER6 can connect to up to 31 other processors using two inter node links (50 GB/s), and supports up to 1024 virtual partitions. ^[7] POWER6 comes in MCMs just like POWER5 with up to four processor dies and associated external L3 cache on a single substrate. A Multi-Chip Module (MCM is a specialized electronic package where multiple Integrated circuits (ICs semiconductor dies or other modules are packaged in such a way as There is an interface to a service processor that monitors and adjusts performance and power according to set parameters. ^[9]

Products

The POWER6 powers the IBM System i 570 and System p 570 (the two are quite similar) which can be configured up to 16 cores and three speeds, 3. The IBM System i is IBM's previous generation of systems designed for IBM i users and was subsequently replaced by the IBM Power Systems in April 2008 The System p, formerly known as RS/6000, was IBM 's RISC / UNIX -based server and workstation product line 5, 4. 2 and 4. 7 GHz. The System i/p 570 can run AIX versions 5. 3L and 6 as well as Linux and i5/OS. Linux (commonly pronounced ˈlɪnəks IBM i is an Operating system used on IBM Power Systems, a unified server platform from the former IBM System i and IBM System p servers

In November 2007, IBM revealed the POWER6 powered single-wide JS22 blade module. Blade servers are self-contained/ all inclusive computer servers, designed for high density [4] It incorporates two POWER6 processors at 4 GHz and up to 32 GB RAM. The module fits into IBM's BladeCenter H and HT chassis supporting advanced virtualization and partitioning features. The JS22 modules can run AIX versions 5. 3L and 6 as well as Linux.

At the SuperComputing 2007 (SC07) conference in Reno a new water-cooled p575 was also revealed with 32 POWER6 cores at 4. 7 GHz with up to 256 GB of RAM.

Future

POWER6 includes redundancy-circuitry, support for mainframe instructions, and many power saving features, so there are plans to make stripped down, low power versions for applications like blade systems, and single core versions. ^[10] The POWER6L^[11] is a low end derivative of POWER6 in the same segment as PowerPC 970 and there have been rumors of an ultra-light version, POWER6UL. The PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM IBM is also investigating a high-end four core version manufactured on a 45 nm process. ^[10]

See also

• IBM POWER
• Power Architecture
• POWER7
• z10, a mainframe processor sharing much technology with the POWER6. POWER is a RISC Instruction set architecture designed by IBM. Power Architecture is a broad term to describe similar Instruction sets for RISC Microprocessors developed and manufactured by such companies as IBM POWER7 is a Microprocessor currently under development at about a dozen IBM sites including IBM 's The z10 is a Microprocessor chip made by IBM for their System z10 Mainframe computers released February 26 2008 Mainframes (often colloquially referred to as Big Iron) are Computers used mainly by large organizations for critical applications typically bulk data

External links

• Oracle Sets New World Records for 4-Core and 8-Core Performance in Two-Tier SAP® Sales and Distribution Standard Application Benchmark, 24 MAY 2007
• IBM Press Kit
• IBM's Power6 doubles speed
• IBM Unleashes World's Fastest Chip in Powerful New Computer, 21 May 2007
• InformationWeek report on the Power6 announcement
• Real World Tech, Dec 19, 2005
• InformationWeek, Feb 6, 2006
• C|Net, Oct 10, 2006
• Heise Online, Oct 12, 2006
• Real World Tech, Oct 16, 2006
• Arstechnica, Oct 19, 2006
• Arstechnica, Feb 12, 2007
• Arstechnica, May 21, 2007
• The POWER6 microarchitecture, November 2007. IBM.com

Recommended reading

• POWER Roadmap, IBM, Oct 2006

References

1. ^ A Mainframe Roadmap. Isham Research. Retrieved on 2005-06-15. Year 2005 ( MMV) was a Common year starting on Saturday (link displays full calendar of the Gregorian calendar. Events 763 BC - Assyrians record a Solar eclipse that will be used to fix the Chronology of Mesopotamian history
2. ^ ^{a b} IBM grills HP with 4.7GHz Power6-based box. The Register. Retrieved on 2007-05-22. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. Events 334 BC - The Greek army of Alexander the Great defeats Darius III of Persia in the Battle of the Granicus.
3. ^ IBM's Power6 Processors to Hit 5.6GHz. The Register. Retrieved on 2006-02-07. Year 2006 ( MMVI) was a Common year starting on Sunday of the Gregorian calendar. Events 457 - Leo I becomes emperor of the Byzantine Empire. 1074 - Battle of Montesarchio in which the Prince
4. ^ IBM's Power6 Gets First Silicon as Power5+ Looms. IT Jungle. Retrieved on 2005-08-22. Year 2005 ( MMV) was a Common year starting on Saturday (link displays full calendar of the Gregorian calendar. Events 392 - Arbogast has Eugenius elected Western Roman Emperor.
5. ^ Roger Howorth (2006-02-08). Year 2006 ( MMVI) was a Common year starting on Sunday of the Gregorian calendar. Events 421 - Constantius III becomes co- Emperor of the Western Roman Empire. IBM's Power6 processor to run at 4GHz in 2007. IT Week.
6. ^ ^{a b c} IBM Tips Power6 Processor Architecture. InformationWeek. Retrieved on 2006-02-06. Year 2006 ( MMVI) was a Common year starting on Sunday of the Gregorian calendar. Events 46 BC - Julius Caesar defeats the combined army of Pompeian followers and Numidians under Metellus Scipio
7. ^ ^{a b c} Fall Processor Forum: Power6 at 5 GHz. Heise online. Retrieved on 2006-10-12. Year 2006 ( MMVI) was a Common year starting on Sunday of the Gregorian calendar. Events 539 BC - The army of Cyrus the Great of Persia takes Babylon.
8. ^ ^{a b} An eCLipz Looms on the Horizon. Real World Technologies. Retrieved on 2005-12-19. Year 2005 ( MMV) was a Common year starting on Saturday (link displays full calendar of the Gregorian calendar. Events 324 - Licinius abdicates his position as Roman Emperor.
9. ^ IBM cranks dual-core Power6 beyond 4GHz. EETimes. Retrieved on 2006-10-10. Year 2006 ( MMVI) was a Common year starting on Sunday of the Gregorian calendar. Events 680 - Battle of Karbala: Shia Imam Husayn bin Ali, the grandson of the Prophet Muhammad, is decapitated
10. ^ ^{a b} IBM's juiced Power6 stomps poor, old Power5+. The Register. Retrieved on 2007-02-16. Year 2007 ( MMVII) was a Common year starting on Monday of the Gregorian calendar in the 21st century. Events 1249 - Andrew of Longjumeau is dispatched by Louis IX of France as his ambassador to meet with the Khan of the Mongols
11. ^ POWER roadmap, page 5. IBM. Retrieved on 2005-10-27. Year 2005 ( MMV) was a Common year starting on Saturday (link displays full calendar of the Gregorian calendar. Events 312 - Constantine the Great is said to have received his famous Vision of the Cross.